MIMEC的纳诺伊克(NanoIC)为先进的芯片连接释放了两个新的PDK, 使人工智能和高性能计算能够更快、更高效的芯片设计成为可能。 imec’s NanoIC releases two new PDKs for advanced chip interconnects, enabling faster, more efficient chiplet designs for AI and high-performance computing.

NanoIC试点线由MIMEC牵头,已发行两套新的公共流程设计包(PDKs),用于细切再分配层和死换混合联结,以便更快、更节能的芯片连接。 The NanoIC pilot line, led by imec, has released two new public process design kits (PDKs) for fine-pitch redistribution layers and die-to-wafer hybrid bonding, enabling faster, more energy-efficient chip interconnects. 这些工具支持下一代芯片设计,将通信速度提高40%,将UCIe-Addced界面的能源使用削减15%。 These tools support next-generation chiplet designs, boosting communication speeds by up to 40% and cutting energy use by up to 15% on UCIe-Advanced interfaces. PDK允许对在AI、高性能计算、GPUs和汽车系统中的应用进行早期设计和测试,预期今后的版本将支持全面制造。 The PDKs allow early-stage design and testing for applications in AI, high-performance computing, GPUs, and automotive systems, with future versions expected to support full fabrication. 这标志着这种先进的互联技术首次被公开使用,将纳诺伊克公司的套件扩大到五个公共PDK,涵盖逻辑、记忆和两海里以外的半导体开发的互联。 This marks the first time such advanced interconnect technologies are openly accessible, expanding NanoIC’s suite to five public PDKs covering logic, memory, and interconnects for beyond-2nm semiconductor development.