Akeana和Axiomise利用正式工具核实了4nm RISC-V芯片,发现了错误,并为关键产业的RISC-V铺平了道路。 Akeana and Axiomise verified a 4nm RISC-V chip using formal tools, finding bugs and paving the way for RISC-V in key industries.

Akeana, Santa Clara的RISC-VIP提供商, 利用正式的核查工具、发现功能错误和多余的逻辑, 与英国的Axiomise公司成功验证了4nm Alpine测试芯片。 Akeana, a Santa Clara-based RISC-V IP provider, has successfully verified its 4nm Alpine test chip with UK firm Axiomise using formal verification tools, uncovering functional bugs and redundant logic. 合作利用Axiomise的核心保护工具,在功能和PPA方面实现了数学上的严格覆盖,标志着计算机、汽车和数据中心市场采用高性能RISC-V的里程碑。 The collaboration, leveraging Axiomise’s CoreProve-powered tools, achieved mathematically rigorous coverage across functional and PPA aspects, marking a milestone for high-performance RISC-V adoption in computing, automotive, and data center markets.